New

Advanced Packaging, Distinguished Architect

Synopsys
$218000-$328000
United States, California, Mountain View
700 East Middlefield Road (Show on map)
Aug 29, 2026
Date posted 08/27/2026 Category Engineering Hire Type Employee Job ID 18426 Base Salary Range $218000-$328000 Remote Eligible Yes Date Posted 08/27/2026 Distinguished Engineer, Advanced Packaging Solutions We Are Synopsys delivers silicon-to-systems design solutions that help engineering teams build the next generation of AI-powered products. Our software, IP, simulation, and analysis platforms enable customers to solve complex design challenges across semiconductors, systems, and advanced packaging. You Are You have spent your career near the physical limits of semiconductor design, where architecture, manufacturability, and performance intersect. You understand that advanced packaging is now part of system architecture, not a downstream implementation step. You think deeply about algorithms and data structures, but you have also shipped production software that real design teams depend on. At Synopsys, you will help shape package substrate design automation within 3DIC Compiler, enabling advanced multi-die systems for AI, high-performance computing, and heterogeneous integration. What You'll Be Doing Architect and drive package substrate design automation capabilities within the 3DIC Compiler platform. Design and implement production-grade algorithms for HDI substrate auto-routing, design rule checking, power delivery network analysis, and design for manufacturability. Build scalable C/C++ software for advanced packaging designs, including multi-die chiplets and heterogeneous integration. Partner with customers, product teams, and R&D to translate design bottlenecks into durable technical solutions. Lead architecture reviews and influence technical decisions across the 3DIC product portfolio. Mentor engineers and raise the bar on algorithmic rigor, performance, and software quality. The Impact You Will Have Define capabilities that enable next-generation advanced packaging designs for AI, high-performance computing, and other complex systems. Reduce design cycle time for customers working on HDI substrates, chiplets, and multi-die architectures. Drive algorithmic advances in auto-routing, power delivery, and design for manufacturability. Shape a strategic Synopsys product line used by leading semiconductor companies. What You'll Need Deep expertise in advanced packaging or package substrate design, routing, power delivery, and manufacturability. Proven experience building production software products at scale. Strong algorithmic foundation for physical design automation challenges. Expert-level C/C++ skills for performance-critical, large-scale systems. Experience in at least one related domain: custom IC design automation, auto-routing, physical verification, or substrate design tools. Advanced degree in Computer Science, Electrical Engineering, or equivalent hands-on R&D experience. Track record of technical leadership through architecture ownership, product influence, publications, or patents. How You Think and Build You see advanced packaging as a systems problem across substrate architecture, connectivity, signal and power integrity, thermal behavior, manufacturability, and tool performance. You thrive in ambiguous technical problems where strong product judgment matters as much as algorithmic depth. You translate customer pain into scalable software architecture. You challenge assumptions with clarity, data, and respect. You care about engineering craft: performance, maintainability, testability, and extensibility. Why This Role Is Different This is a chance to help define how engineering teams design, analyze, and sign off the next generation of multi-die systems. As AI, high-performance computing, and heterogeneous integration push beyond monolithic scaling, package architecture is becoming a primary driver of system performance. You will have the technical latitude to build from first principles: smarter substrate automation, scalable routing, tighter analysis integration, and workflows that make advanced multi-die architecture practical for real design teams. For an engineer who wants to build rather than maintain, this role offers a visible imprint on a major transition in semiconductor design. The Team You'll Be Part Of You will be a key technical leader on the advanced packaging design automation team for 3DIC Compiler. The team is focused on package substrate design and the industry shift toward chiplet architectures and heterogeneous integration. Your work will directly shape the product roadmap and technical direction of a strategic Synopsys growth area. Rewards and Benefits Synopsys offers health, wellness, and financial benefits, including monetary and non-monetary rewards. Your recruiter will share compensation and benefits details during the hiring process. #LI-MK1 At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.